The ongoing global battle for technological supremacy between the United States and China has only intensified in recent years, particularly in the realm of semiconductor manufacturing. At the heart of this tension lies a crucial component: photolithography equipment . The U.S. government is determined to prevent China from acquiring advanced lithography machines, which are essential for producing highly integrated semiconductors utilized in data centers specialized in artificial intelligence (AI). The stakes are high, and the U.S. aims to stymie China’s tech development, effectively slowing down its progress.
China has responded aggressively, pouring unprecedented resources into developing its own lithography technology. Significant investments began around 2014 and 2019, with the Chinese government allocating approximately $19 billion in 2014 and an additional $27.5 billion in 2019. However, these investments were just the beginning. In late 2023, the Chinese government approved a massive $41 billion investment aimed specifically at boosting lithography equipment manufacturing.
Despite these efforts, lithography machines represent only one part of the equation in China’s quest for semiconductor advancement. The most promising player in the field is Semiconductor Manufacturing International Corp (SMIC) . Over the last two years, SMIC has painstakingly refined its technology to produce 5nm integrated circuits . Recent forecasts indicate that the company recorded a 22% increase in revenue and a 35.6% rise in profit during the first half of 2025 compared to the same timeframe the previous year, highlighting significant progress.
This is SMIC’s great challenge: go beyond 7 nm
Industry expert Dr. Kim—who has experience with major firms such as Samsung and TSMC—believes that SMIC is on the verge of beginning 5nm chip production . Although the company has been engaged in this endeavor for years, Dr. Kim warns of a critical challenge: the performance per wafer at SMIC’s current 5nm nodes is considerably low, estimated to be under 30%.
<img alt="China is already at the forefront in particle physics. Its new neutrino detector is the most advanced that exists" width="375" height="142" src="https://i.blogs.es/3b2e34/junofinal-ap/375_142.jpeg"/>When semiconductor manufacturers create a chip wafer, it is common for a percentage of those chips to malfunction. Normally, the performance per wafer improves as engineers fine-tune their processes, but new technologies often exhibit lower efficiency initially. Dr. Kim points out that a mature lithographic technology generally offers a graduation of effectiveness, whereas newer technologies can hover around 50% performance , leading to significant wastage.
The 5Nm chips that SMIC will manufacture for Huawei are possible thanks to a technology known as SAQP.
To ensure economic viability, the performance per wafer for a new semiconductor integration technology needs to exceed 70% —a benchmark currently unattainable by SMIC. The challenges stem from the Multiple Patterning technique it employs. This method involves applying multiple layers of patterns onto a wafer to enhance the lithographic resolution, however, this process inherently limits the viable performance rate.
Looking ahead, the 5nm circuits SMIC plans to manufacture for Huawei will utilize a more advanced method known as Self-Aligned Quadruple Patterning (SAQP) . This sophisticated technique builds upon Multiple Patterning, propelling the production process beyond its current limitations, which were previously used for 7nm chips .
A report from Economic Daily News , a Taiwanese media outlet, suggests that SMIC may begin manufacturing 3nm semiconductors equipped with Gate-All-Around (GAA) transistors for Huawei by 2026 . Not only that, but hints of laboratory experiments concerning the use of carbon nanotubes in semiconductor manufacturing were also revealed, aiming to push the boundaries of speed and efficiency in chip production.
Image | SMIC
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